Spin wave based full adder

Abdulqader Mahmoud, Frederic Vanderveken, Florin Ciubotaru, Christoph Adelmann, Sorin Cotofana, Said Hamdioui

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

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Abstract

Spin Waves (SWs) propagate through magnetic waveguides and interfere with each other without consuming noticeable energy, which opens the road to new ultra-low energy circuit designs. In this paper we build upon SW features and propose a novel energy efficient Full Adder (FA) design consisting of 1 Majority and 2 XOR gates, which outputs Sum and Carry − out are generated by means of threshold and phase detection, respectively. We validate our proposal by means of MuMax3 micromagnetic simulations and we evaluate and compare its performance with state-of-the-art SW, 22 nm CMOS, Magnetic Tunnel Junction (MTJ), Spin Hall Effect (SHE), Domain Wall Motion (DWM), and Spin-CMOS implementations. Our evaluation indicates that the proposed SW FA consumes 22.5% and 43% less energy than the direct SW gate based and 22 nm CMOS counterparts, respectively. Moreover it exhibits a more than 3 orders of magnitude smaller energy consumption when compared with state-of-the-art MTJ, SHE, DWM, and Spin-CMOS based FAs, and outperforms its contenders in terms of area by requiring at least 22% less chip real-estate.

Original languageEnglish
Title of host publication2021 IEEE International Symposium on Circuits and Systems (ISCAS)
Place of PublicationPiscataway
PublisherIEEE
Number of pages5
ISBN (Electronic)978-1-7281-9201-7
DOIs
Publication statusPublished - 2021
Event53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Virtual at Daegu, Korea, Republic of
Duration: 22 May 202128 May 2021

Conference

Conference53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021
CountryKorea, Republic of
CityVirtual at Daegu
Period22/05/2128/05/21

Keywords

  • Spin-wave
  • Spin-wave computation paradigm
  • Full adder
  • Energy
  • Delay
  • Area

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