Spurious free time-to-digital conversion in an ADPLL using short dithering sequences

K Waheed; M Sheba; RB Staszewski; F Dulger; SD Vamvakos

Spurious free time-to-digital conversion in an ADPLL using short dithering sequences

K Waheed, M Sheba, RB Staszewski, F Dulger, SD Vamvakos

Electronics

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

8 Citations (Scopus)

Original language	English
Title of host publication	Proceedings of 2010 IEEE Custom Integrated Circuits Conference
Editors	R Patel
Place of Publication	Los Alamitos, CA, USA
Publisher	IEEE Society
Pages	1-4
Number of pages	4
ISBN (Print)	978-1-4244-5758-8
Publication status	Published - 2010
Event	IEEE CICC 2010 - Los Alamitos, CA, USA Duration: 19 Sept 2010 → 22 Sept 2010

Publication series

Name
Publisher	IEEE

Conference

Conference	IEEE CICC 2010
Period	19/09/10 → 22/09/10

Bibliographical note

10.1109/CICC.2010.5617430

Keywords

Conf.proc. > 3 pag

Cite this

@inproceedings{09df75ed84134fe9ad1487c278fc5927,

title = "Spurious free time-to-digital conversion in an ADPLL using short dithering sequences",

keywords = "Conf.proc. > 3 pag",

author = "K Waheed and M Sheba and RB Staszewski and F Dulger and SD Vamvakos",

note = "10.1109/CICC.2010.5617430; IEEE CICC 2010 ; Conference date: 19-09-2010 Through 22-09-2010",

year = "2010",

language = "English",

isbn = "978-1-4244-5758-8",

publisher = "IEEE Society",

pages = "1--4",

editor = "R Patel",

booktitle = "Proceedings of 2010 IEEE Custom Integrated Circuits Conference",

}

Spurious free time-to-digital conversion in an ADPLL using short dithering sequences. / Waheed, K; Sheba, M; Staszewski, RB et al.
Proceedings of 2010 IEEE Custom Integrated Circuits Conference. ed. / R Patel. Los Alamitos, CA, USA: IEEE Society, 2010. p. 1-4.

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

T1 - Spurious free time-to-digital conversion in an ADPLL using short dithering sequences

AU - Waheed, K

AU - Sheba, M

AU - Staszewski, RB

AU - Dulger, F

AU - Vamvakos, SD

N1 - 10.1109/CICC.2010.5617430

PY - 2010

Y1 - 2010

KW - Conf.proc. > 3 pag

M3 - Conference contribution

SN - 978-1-4244-5758-8

SP - 1

EP - 4

BT - Proceedings of 2010 IEEE Custom Integrated Circuits Conference

A2 - Patel, R

PB - IEEE Society

CY - Los Alamitos, CA, USA

T2 - IEEE CICC 2010

Y2 - 19 September 2010 through 22 September 2010

ER -