Sub-500 degrees C solid-phase epitaxy of ultra-abrupt P+-silicon elevated contacts and diodes

Y Civale, LK Nanver, P Hadley, EJG Goudena, H Schellevis

Research output: Contribution to journalArticleScientificpeer-review

18 Citations (Scopus)

Abstract

A well-controlled low-temperature process, demonstrated from 350/spl deg/C to 500/spl deg/C, has been developed for epitaxially growing elevated contacts and near-ideal diode junctions of Al-doped Si in contact windows to the Si substrate. A physical-vapor-deposited (PVD) amorphous silicon layer is converted to monocrystalline silicon selectively in the contact windows by using a PVD aluminum layer as a transport medium. This is a solid-phase-epitaxy (SPE) process by which the grown Si is Al-doped to at least 10/sup 18/ cm/sup -3/. Contact resistivity below 10/sup -7/ /spl Omega//spl middot/cm/sup 2/ is achieved to both p/sup -/ and p/sup +/ bulk-silicon regions. The elevated contacts have also been employed to fabricate p/sup +/-n diodes and p/sup +/-n-p bipolar transistors, the electrical characterization of which indicates a practically defect-free epitaxy at the interface.
Original languageUndefined/Unknown
Pages (from-to)341-343
Number of pages3
JournalIEEE Electron Device Letters
Volume27
Issue number5
DOIs
Publication statusPublished - 2006

Keywords

  • Elektrotechniek
  • Techniek
  • academic journal papers
  • CWTS JFIS >= 2.00

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