Testing address decoder faults in two-port memories: fault models, test, consequences of port restrictions, and test strategy

S Hamdioui, AJ van de Goor Ph D

Research output: Contribution to journal › Article › Scientific › peer-review

Original language	Undefined/Unknown
Pages (from-to)	487-498
Number of pages	12
Journal	Journal of Electronic Testing: theory and applications
Volume	16
Issue number	5
Publication status	Published - 2000

Keywords

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