The recursive grid layout scheme for VLSI layout of hierarchical networks

EA Varvarigos, B Parhami, CH Yeh

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

8 Citations (Scopus)
Original languageUndefined/Unknown
Title of host publicationIPPS/SPDP 1999 Proceedings
Place of PublicationLos Alamitos
PublisherIEEE
Pages441-445
Number of pages5
ISBN (Print)0-7695-0143-5
Publication statusPublished - 1999
Event13th International parallel processing symposium & 10th symposium on parallel and distributed processing, San Juan, Puerto Rico - Los Alamitos
Duration: 12 Apr 199916 Apr 1999

Publication series

Name
PublisherIEEE Computer Society

Conference

Conference13th International parallel processing symposium & 10th symposium on parallel and distributed processing, San Juan, Puerto Rico
Period12/04/9916/04/99

Keywords

  • ZX Int.klas.verslagjaar < 2002

Cite this

Varvarigos, EA., Parhami, B., & Yeh, CH. (1999). The recursive grid layout scheme for VLSI layout of hierarchical networks. In IPPS/SPDP 1999 Proceedings (pp. 441-445). IEEE.