Towards Robust Implementation of Memristor Crossbar Logic Circuits

L. Xie

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

4 Citations (Scopus)


Memristor crossbar is a promising technology for future VLSI circuits due to its scalability, non-volatility, high integration density, etc. However, sneak path currents in the crossbar pose major robustness challenges. One proposed solution is applying half-select voltages to floating nanowires (which are not involved in logic operations). This paper analyzes the sneak path issue after applying half-select voltages, and then uses this analysis to derive a set of realization parameter constraints for robustness. In addition, the constraints are used to estimate maximal crossbar size of logic circuits. As a case study, a one-bit full adder is implemented and verified with SPICE simulations; the results show that the proposed approach accurately predicts the impact of sneak path currents with a maximal error of 0.06V.
Original languageEnglish
Title of host publication2016 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)
Place of PublicationPiscataway., NJ
Number of pages4
ISBN (Print)978-1-5090-0493-5
Publication statusPublished - 2016
EventPRIME 2016: 12th Conference on PhD Research in Microelectronics and Electronics - Lisbon, Portugal
Duration: 27 Jun 201630 Jun 2016
Conference number: 12


ConferencePRIME 2016


  • adders
  • logic circuits
  • memristor circuits
  • nanowires
  • SPICE simulations
  • VLSI circuits
  • floating nanowires
  • full adder
  • half-select voltages
  • logic operations
  • memristor crossbar logic circuits
  • realization parameter constraints
  • robust implementation
  • sneak path currents
  • word length 1 bit
  • Equivalent circuits
  • Frequency modulation
  • Memristors
  • Nanowires
  • Resistance
  • Robustness
  • Switches


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