Transceiver ASIC Design for High-Frame-Rate 3D Intracardiac Echocardiography

Research output: Contribution to conferencePosterScientific

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This work describes an ASIC design for high-frame-rate 3D intracardiac echocardiography probes. The chip is the first to combine element-level high-voltage pulsers and time-gain-compensation analog frontends as well as subarray beamformers and in-probe digitization in a pitch-matched fashion. The integration challenge is met by a shared hybrid beamforming ADC with the highest reported area and power efficiency. The achieved beamformer size of three elements enables acquisition at 1000 volumes/s while, in combination with a custom datalink, still providing sufficient channel-count reduction for catheter integration.
Original languageEnglish
Number of pages1
Publication statusPublished - 2022
Event2022 IEEE International Ultrasonics Symposium - Venice, Italy
Duration: 10 Oct 202213 Oct 2022


Conference2022 IEEE International Ultrasonics Symposium
Abbreviated titleIUS 2022


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