Two calibration methods to improve the linearity of a CMOS image sensor

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Abstract

This paper presents two on-chip calibration methods for improving the linearity of a CMOS image sensor (CIS). A prototype 128 × 128 pixel sensor with a size of 10 μm×12 μm is fabricated using a 0.18 μm 1P4M CIS process. Both calibration methods show obvious improvement on the linearity of the CIS. Compared with the voltage mode (VM) calibration, the pixel mode (PM) calibration method achieves better linearity results by improving the nonlinearity of the CIS 26×. This results in a minimum nonlinearity of 0.026%, which is a 2× better than the state-of-the-art.
Original languageEnglish
Title of host publicationElectronic Imaging
Subtitle of host publicationImage Sensors and Imaging Systems 2018
EditorsA. Darmont, A. Peizerat, R. Widenhorn
Place of PublicationSpringfield
PublisherSociety for Imaging Sciences and Technology
Pages458-1-458-5
Number of pages5
DOIs
Publication statusPublished - 2018
EventHuman Vision and Electronic Imaging 2018 IS&T International Symposium on Electronic Imaging 2018 - Burlingame, United States
Duration: 28 Jan 20182 Feb 2018

Publication series

NameElectronic Imaging
PublisherSociety for Imaging Science and Technology
ISSN (Print)2470-1173

Conference

ConferenceHuman Vision and Electronic Imaging 2018 IS&T International Symposium on Electronic Imaging 2018
CountryUnited States
City Burlingame
Period28/01/182/02/18

Keywords

  • Calibration
  • CMOS image sensor
  • Linearity

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