Using Hopfield Networks to Correct Instruction Faults

T.C. Köylü*, M. Fieback, S. Hamdioui, M. Taouil

*Corresponding author for this work

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

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Fault injection attacks pose an important threat to security-sensitive applications, such as secure communication and storage. By injecting faults into instructions, an attacker can cause information leakage or denial-of-service. Hence, it is important to secure the sensitive parts not only by detecting faults in the executed instructions but also by correcting them. In this work, we propose a hardware detection and correction module based on Hopfield networks. Our module is connected to the instruction buffer and validates all fetched instructions. In case faults are detected, faulty instructions are replaced by corrected ones. Experimental results on a small RISC-V processor and two RSA implementations show that we achieve near perfect detection and around 70% accurate correction with 9% area overhead. This correction rate is enough to secure some implementations for all considered attacks.
Original languageEnglish
Title of host publication2022 IEEE 31st Asian Test Symposium (ATS)
Number of pages6
ISBN (Electronic)978-1-6654-7227-2
ISBN (Print)978-1-6654-7228-9
Publication statusPublished - 2022
Event2022 IEEE 31st Asian Test Symposium - Taichung City, Taiwan
Duration: 21 Nov 202223 Nov 2022
Conference number: 31


Conference2022 IEEE 31st Asian Test Symposium
Abbreviated titleATS
CityTaichung City
Internet address

Bibliographical note

Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project
Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.


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