Vertical silicon-on-nothing FET: subthreshold slope calculation using compact capacitance model

B Svilicic, V Jovanovic, T Suligoj

Research output: Contribution to journal › Article › Scientific › peer-review

Original language	Undefined/Unknown
Pages (from-to)	1-4
Number of pages	4
Journal	Informacije MIDEM: journal of microelectronics, electric components and materials
Volume	38
Issue number	1
Publication status	Published - 2008

Keywords

@article{3f32080ee82d425eb48006361af62706,

title = "Vertical silicon-on-nothing FET: subthreshold slope calculation using compact capacitance model",

keywords = "academic journal papers, CWTS JFIS < 0.75",

author = "B Svilicic and V Jovanovic and T Suligoj",

year = "2008",

language = "Undefined/Unknown",

volume = "38",

pages = "1--4",

journal = "Informacije MIDEM: journal of microelectronics, electric components and materials",

issn = "0352-9045",

publisher = "Society for Microelectronics, Electric Components and Materials",

number = "1",

}

TY - JOUR

T1 - Vertical silicon-on-nothing FET: subthreshold slope calculation using compact capacitance model

AU - Svilicic, B

AU - Jovanovic, V

AU - Suligoj, T

PY - 2008

Y1 - 2008

KW - academic journal papers

KW - CWTS JFIS < 0.75

M3 - Article

SN - 0352-9045

VL - 38

SP - 1

EP - 4

JO - Informacije MIDEM: journal of microelectronics, electric components and materials

JF - Informacije MIDEM: journal of microelectronics, electric components and materials

IS - 1

ER -