Abstract
As CMOS scaling proceeds with sub-10 nm nodes, new architectures and materials are implemented to continue increasing performances at constant footprint. Strained and stacked channels and 3D-integrated devices have for instance been introduced for this purpose. A common requirement for these new technologies is a strict limitation in thermal budgets to preserve the integrity of devices already present on the chips. We present our latest developments on low-temperature epitaxial growth processes, ranging from channel to source/drain applications for a variety of devices and describe options to address the upcoming challenges.
Original language | English |
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Title of host publication | ECS Transactions |
Editors | J.-M. Hartmann, A. Thean , A. Ogura , X. Gong , D. Harame , M. Caymax, G Niu , A. Schulze , Q. Liu , G Mashi, S. Miyazaki , A. Mai, M. Osting |
Publisher | The Electrochemical Society, Inc. |
Pages | 163-175 |
Volume | 86 |
Edition | 7 |
ISBN (Electronic) | 978-160768539-5 |
DOIs | |
Publication status | Published - 2018 |
Event | 8th Symposium on SiGe, Ge, and Related Compounds: Materials, Processing, and Devices - AiMES 2018, ECS and SMEQ Joint International Meeting - Cancun, Mexico Duration: 30 Sept 2018 → 4 Oct 2018 |
Conference
Conference | 8th Symposium on SiGe, Ge, and Related Compounds: Materials, Processing, and Devices - AiMES 2018, ECS and SMEQ Joint International Meeting |
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Country/Territory | Mexico |
City | Cancun |
Period | 30/09/18 → 4/10/18 |