Abstract
This thesis presents the design and measurement of an RF energy harvesting and power management unit that operates across a wide range of available input power. The system comprises an adaptive impedance matching network, a single-stage cross-coupled differential-drive rectifier, a start-up charge pump, an adaptive buck-boost converter, a Maximum Power Point Tracking (MPPT) circuit and a control loop to regulate the load voltage. The MPPT circuit controls the switching frequency of the buck-boost converter and configures the impedance matching network, optimizing the interfaces between the rectifier and antenna and between the rectifier and the storage capacitor, guaranteeing that the power is being harvested at maximum efficiency. To boost the rectifier output, to accumulate energy in the storage capacitor and to provide energy to the load, a single-inductor buck-boost converter that has two inputs and three outputs is used. Circuit techniques that reduce the power consumption of the control circuits and that allow for adapting the interfaces between the antenna, the rectifier and the load are presented. In order to introduce adaptability to the circuits while maintaining high power conversion efficiency and high sensitivity, new circuit techniques are introduced. The novel circuits presented in this paper are: a low-power, compact input power estimation circuit employed in the maximum power point tracking (MPPT) circuit, configurable power switches employed in the DC-DC converter, and a high-speed low-power zero current detector also employed in the DC-DC converter. In this thesis we introduce a method of designing optimal multi-stage impedance matching circuit.Furthermore, the proposed system employs an adaptive impedance matching network and a method of regulating the load voltage while performing energy harvesting using a single power inductor. The designed system operates on input power ranging from $-24$ to \SI[retain-explicit-plus]{+15}{\dBm}.The employed technology is a standard \SI{0.18}{\micro\m} CMOS process.It is designed to receive power at the \SI{403.5}{\MHz} center frequency.The peak energy harvesting efficiency is \SI{40.2}{\percent} at \SI{-9.1}{\dBm} available input power and the sensitivity is \SI{-24}{\dBm} while producing a \SI{1.8}{\V} output.
Original language | English |
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Qualification | Doctor of Philosophy |
Awarding Institution |
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Supervisors/Advisors |
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Award date | 3 Dec 2021 |
Print ISBNs | 978-94-6419-382-4 |
DOIs | |
Publication status | Published - 2021 |
Keywords
- Energy Harvesting
- Lower-power Analog Design
- RF Energy Harvesting
- RFEH
- Wireless Power
- Transfer