Would Magnonic Circuits Outperform CMOS Counterparts?

Abdulqader Mahmoud, Nicoleta Cucu-Laurenciu, Frederic Vanderveken, Florin Ciubotaru, Christoph Adelmann, Sorin Cotofana, Said Hamdioui

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

2 Citations (Scopus)
19 Downloads (Pure)


In the early stages of a novel technology development, it is difficult to provide a comprehensive assessment of its potential capabilities and impact. Nevertheless, some preliminary estimates can be drawn and are certainly of great interest and in this paper we follow this line of reasoning within the framework of the Spin Wave (SW) based computing paradigm. In particular, we are interested in assessing the technological development horizon that needs to be reached in order to unleash the full SW paradigm potential such that SW circuits can outperform CMOS counterparts in terms of energy consumption. In view of the zero power SWs propagation through ferromagnetic waveguides, the overall SW circuit power consumption is determined by the one associated to SWs generation and sensing by means of transducers. While current antenna based transducers are clearly power hungry recent developments indicate that magneto-electric (ME) cells have a great potential for ultra-low power SW generation and sensing. Given that MEs have been only proposed at the conceptual level and no actual experimental demonstration has been reported we cannot evaluate the impact of their utilization on the SW circuit energy consumption. However, we can perform a reverse engineering alike analysis to determine ME delay and power consumption upper bounds that can place SW circuits in the leading position. To this end, we utilize a 32-bit Brent-Kung Adder (BKA) as discussion vehicle and compute the maximum ME delay and power consumption that could potentially enable a SW implementation able to outperform its 7nm CMOS counterpart. We evaluate different BKA SW implementations that rely on conversion- or normalization-based gate cascading and consider continuous or pulsed SW generation scenarios. Our evaluations indicate that 31nW is the maximum transducer power consumption for which a 32-bit Brent-Kung SW implementation can outperform its 7nm CMOS counterpart in terms of energy consumption.

Original languageEnglish
Title of host publicationGLSVLSI 2022 - Proceedings of the Great Lakes Symposium on VLSI 2022
PublisherAssociation for Computing Machinery (ACM)
Number of pages5
ISBN (Electronic)9781450393225
Publication statusPublished - 2022
Event32nd Great Lakes Symposium on VLSI, GLSVLSI 2022 - Irvine, United States
Duration: 6 Jun 20228 Jun 2022

Publication series

NameProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI


Conference32nd Great Lakes Symposium on VLSI, GLSVLSI 2022
Country/TerritoryUnited States


  • benchmarking
  • brent-kung prefix adder
  • cmos
  • computing paradigm
  • delay
  • power consumption
  • spin-wave


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