TY - GEN
T1 - 29.3 A Cryo-CMOS Receiver with 15K Noise Temperature Achieving 9.8dB SNR in 10μs Integration Time for Spin Qubit Readout
AU - Prabowo, Bagas
AU - Pietx-Casas, Oriol
AU - Montazerolghaem, Mohammad Ali
AU - Scappucci, Giordano
AU - Vandersypen, Lieven M.K.
AU - Sebastiano, Fabio
AU - Babaie, Masoud
N1 - Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.
PY - 2024
Y1 - 2024
N2 - Continuous rounds of quantum error correction (QEC) are essential to achieve faulttolerant quantum computers (QCs). In each QEC cycle, thousands of ancilla quantum bits (qubits) must be read out faster than the qubits' decoherence time (<<T2∗~120μs for spin qubits). To address this urgent need, several CMOS receivers operating at cryogenic temperatures (cryo-CMOS RXs) have recently been introduced for gate-based [1] and RF reflectometry [2] readout of spin qubits, as well as transmons' dispersive readout [3]. However, they have a few shortcomings. First, due to the temperatureindependent shot noise of transistors in nanometer CMOS technology [4], their measured noise temperature (TN) is limited to 40K, thus degrading qubit readout fidelity. Second, due to their large TN, prior art showed either only the electrical performance of their chips by applying a relatively large (i.e., -85dBm [2]) modulated signal directly to the RX input [2,3] or offered limited qubit measurements by exploiting a HEMT amplifier prior to the RX [1]. Those issues hinder future monolithic integration between solid-state qubits and readout electronics. This work advances the prior art by (1) introducing a wideband passive amplification circuit at the RX front-end to minimize the shot noise contribution of the active devices, lowering prior art TN by ~2.7x; (2) demonstrating the RX performance in an RF-reflectometry qubit readout scheme without using off-the-shelf LNA prior to the RX.
AB - Continuous rounds of quantum error correction (QEC) are essential to achieve faulttolerant quantum computers (QCs). In each QEC cycle, thousands of ancilla quantum bits (qubits) must be read out faster than the qubits' decoherence time (<<T2∗~120μs for spin qubits). To address this urgent need, several CMOS receivers operating at cryogenic temperatures (cryo-CMOS RXs) have recently been introduced for gate-based [1] and RF reflectometry [2] readout of spin qubits, as well as transmons' dispersive readout [3]. However, they have a few shortcomings. First, due to the temperatureindependent shot noise of transistors in nanometer CMOS technology [4], their measured noise temperature (TN) is limited to 40K, thus degrading qubit readout fidelity. Second, due to their large TN, prior art showed either only the electrical performance of their chips by applying a relatively large (i.e., -85dBm [2]) modulated signal directly to the RX input [2,3] or offered limited qubit measurements by exploiting a HEMT amplifier prior to the RX [1]. Those issues hinder future monolithic integration between solid-state qubits and readout electronics. This work advances the prior art by (1) introducing a wideband passive amplification circuit at the RX front-end to minimize the shot noise contribution of the active devices, lowering prior art TN by ~2.7x; (2) demonstrating the RX performance in an RF-reflectometry qubit readout scheme without using off-the-shelf LNA prior to the RX.
UR - http://www.scopus.com/inward/record.url?scp=85180348527&partnerID=8YFLogxK
U2 - 10.1109/ISSCC49657.2024.10454300
DO - 10.1109/ISSCC49657.2024.10454300
M3 - Conference contribution
AN - SCOPUS:85180348527
T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
SP - 474
EP - 476
BT - 2024 IEEE International Solid-State Circuits Conference, ISSCC 2024
PB - IEEE
T2 - 2024 IEEE International Solid-State Circuits Conference, ISSCC 2024
Y2 - 18 February 2024 through 22 February 2024
ER -