A Benchmark of Cryo-CMOS 40-nm Embedded SRAM/DRAMs for Quantum Computing

Rob A. Damsteegt; Ramon W.J. Overwater; Masoud Babaie; Fabio Sebastiano

doi:10.1109/ESSCIRC59616.2023.10268788

A Benchmark of Cryo-CMOS 40-nm Embedded SRAM/DRAMs for Quantum Computing

Rob A. Damsteegt^*, Ramon W.J. Overwater, Masoud Babaie, Fabio Sebastiano

^*Corresponding author for this work

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

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Abstract

The cryogenic electronic interface for quantum pro-cessors requires cryo-CMOS embedded memories that cover a wide range of specifications. The temperature dependence of device parameters, such as the threshold voltage, the gate/subthreshold leakage, and the variability, severely alters the memories' performance between room temperature (RT) and cryogenic temperatures (4.2K). To assess the best memory design for a given application, this paper benchmarks three custom DRAMs and a custom SRAM in 40-nm CMOS at 4.2 K and RT, e.g., identifying that, while the SRAM is more power efficient for moderate-to-high speeds at RT, the 2T DRAM performs better than SRAM and 3T DRAMs at 4.2 K.

Original language	English
Title of host publication	ESSCIRC 2023 - IEEE 49th European Solid State Circuits Conference
Publisher	IEEE
Pages	165-168
Number of pages	4
ISBN (Electronic)	9798350304206
DOIs	https://doi.org/10.1109/ESSCIRC59616.2023.10268788
Publication status	Published - 2023
Event	49th IEEE European Solid State Circuits Conference, ESSCIRC 2023 - Lisbon, Portugal Duration: 11 Sept 2023 → 14 Sept 2023

Publication series

Name	European Solid-State Circuits Conference
Volume	2023-September
ISSN (Print)	1930-8833

Conference

Conference	49th IEEE European Solid State Circuits Conference, ESSCIRC 2023
Country/Territory	Portugal
City	Lisbon
Period	11/09/23 → 14/09/23

Bibliographical note

Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care
Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

Keywords

Cryo-CMOS
DRAM
eDRAM
SRAM

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A_Benchmark_of_Cryo-CMOS_40-nm_Embedded_SRAM_DRAMs_for_Quantum_ComputingFinal published version, 1.29 MB

Cite this

@inproceedings{6031fc4fc00d4111af0ce0912b46b4bf,

title = "A Benchmark of Cryo-CMOS 40-nm Embedded SRAM/DRAMs for Quantum Computing",

abstract = "The cryogenic electronic interface for quantum pro-cessors requires cryo-CMOS embedded memories that cover a wide range of specifications. The temperature dependence of device parameters, such as the threshold voltage, the gate/subthreshold leakage, and the variability, severely alters the memories' performance between room temperature (RT) and cryogenic temperatures (4.2K). To assess the best memory design for a given application, this paper benchmarks three custom DRAMs and a custom SRAM in 40-nm CMOS at 4.2 K and RT, e.g., identifying that, while the SRAM is more power efficient for moderate-to-high speeds at RT, the 2T DRAM performs better than SRAM and 3T DRAMs at 4.2 K.",

keywords = "Cryo-CMOS, DRAM, eDRAM, SRAM",

author = "Damsteegt, {Rob A.} and Overwater, {Ramon W.J.} and Masoud Babaie and Fabio Sebastiano",

note = "Green Open Access added to TU Delft Institutional Repository {\textquoteleft}You share, we take care!{\textquoteright} – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public. ; 49th IEEE European Solid State Circuits Conference, ESSCIRC 2023 ; Conference date: 11-09-2023 Through 14-09-2023",

year = "2023",

doi = "10.1109/ESSCIRC59616.2023.10268788",

language = "English",

series = "European Solid-State Circuits Conference",

publisher = "IEEE",

pages = "165--168",

booktitle = "ESSCIRC 2023 - IEEE 49th European Solid State Circuits Conference",

address = "United States",

}

Damsteegt, RA , Overwater, RWJ , Babaie, M & Sebastiano, F 2023, A Benchmark of Cryo-CMOS 40-nm Embedded SRAM/DRAMs for Quantum Computing. in ESSCIRC 2023 - IEEE 49th European Solid State Circuits Conference. European Solid-State Circuits Conference, vol. 2023-September, IEEE, pp. 165-168, 49th IEEE European Solid State Circuits Conference, ESSCIRC 2023, Lisbon, Portugal, 11/09/23. https://doi.org/10.1109/ESSCIRC59616.2023.10268788

A Benchmark of Cryo-CMOS 40-nm Embedded SRAM/DRAMs for Quantum Computing. / Damsteegt, Rob A.; Overwater, Ramon W.J.; Babaie, Masoud et al.
ESSCIRC 2023 - IEEE 49th European Solid State Circuits Conference. IEEE, 2023. p. 165-168 (European Solid-State Circuits Conference; Vol. 2023-September).

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

T1 - A Benchmark of Cryo-CMOS 40-nm Embedded SRAM/DRAMs for Quantum Computing

AU - Damsteegt, Rob A.

AU - Overwater, Ramon W.J.

AU - Babaie, Masoud

AU - Sebastiano, Fabio

N1 - Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

PY - 2023

Y1 - 2023

N2 - The cryogenic electronic interface for quantum pro-cessors requires cryo-CMOS embedded memories that cover a wide range of specifications. The temperature dependence of device parameters, such as the threshold voltage, the gate/subthreshold leakage, and the variability, severely alters the memories' performance between room temperature (RT) and cryogenic temperatures (4.2K). To assess the best memory design for a given application, this paper benchmarks three custom DRAMs and a custom SRAM in 40-nm CMOS at 4.2 K and RT, e.g., identifying that, while the SRAM is more power efficient for moderate-to-high speeds at RT, the 2T DRAM performs better than SRAM and 3T DRAMs at 4.2 K.

AB - The cryogenic electronic interface for quantum pro-cessors requires cryo-CMOS embedded memories that cover a wide range of specifications. The temperature dependence of device parameters, such as the threshold voltage, the gate/subthreshold leakage, and the variability, severely alters the memories' performance between room temperature (RT) and cryogenic temperatures (4.2K). To assess the best memory design for a given application, this paper benchmarks three custom DRAMs and a custom SRAM in 40-nm CMOS at 4.2 K and RT, e.g., identifying that, while the SRAM is more power efficient for moderate-to-high speeds at RT, the 2T DRAM performs better than SRAM and 3T DRAMs at 4.2 K.

KW - Cryo-CMOS

KW - DRAM

KW - eDRAM

KW - SRAM

UR - http://www.scopus.com/inward/record.url?scp=85175266252&partnerID=8YFLogxK

U2 - 10.1109/ESSCIRC59616.2023.10268788

DO - 10.1109/ESSCIRC59616.2023.10268788

M3 - Conference contribution

AN - SCOPUS:85175266252

T3 - European Solid-State Circuits Conference

SP - 165

EP - 168

BT - ESSCIRC 2023 - IEEE 49th European Solid State Circuits Conference

PB - IEEE

T2 - 49th IEEE European Solid State Circuits Conference, ESSCIRC 2023

Y2 - 11 September 2023 through 14 September 2023

ER -

A Benchmark of Cryo-CMOS 40-nm Embedded SRAM/DRAMs for Quantum Computing

Abstract

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