Abstract
We propose a 50-MS/s two-step flash-ΔΣ time-to-digital converter (TDC) using stable time amplifiers (TAs). The TDC demonstrates low-levels of shaped quantization noise. The system is simulated in 40-nm CMOS and consumes 1.3 mA from a 1.1 V supply. The bandwidth is broadened to Nyquist rate. At frequencies below 25 MHz, the integrated TDC error is as low as 143 fsrms, which is equal to an equivalent TDC resolution of 0.5 ps.
Original language | English |
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Title of host publication | 2016 2nd International Conference on Event-Based Control, Communication, and Signal Processing (EBCCSP) |
Subtitle of host publication | Proceedings |
Place of Publication | Danvers |
Publisher | IEEE |
Pages | 1-4 |
Number of pages | 4 |
ISBN (Electronic) | 978-1-5090-4196-1 |
ISBN (Print) | 978-1-5090-4197-8 |
DOIs | |
Publication status | Published - 20 Oct 2016 |
Event | 2nd International Conference on Event-Based Control, Communication, and Signal Processing, EBCCSP 2016 - Krakow, Poland Duration: 13 Jun 2016 → 15 Jun 2016 |
Conference
Conference | 2nd International Conference on Event-Based Control, Communication, and Signal Processing, EBCCSP 2016 |
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Country/Territory | Poland |
City | Krakow |
Period | 13/06/16 → 15/06/16 |
Keywords
- error feedback
- MASH
- Noise shaping
- TDC
- time amplifier
- time domain register
- time-interleaved
- two-step