A 120-MHz BW, 122-dBFS SFDR CT ΔΣ ADC With a Multi-Path Multi-Frequency Chopping Scheme

Sundeep Javvaji; Muhammed Bolatkale; Shagun Bajoria; Robert Rutten; Bert Oude Essink; Koen Beijens; Kofi A.A. Makinwa; Lucien J. Breems

doi:10.1109/JSSC.2024.3354574

A 120-MHz BW, 122-dBFS SFDR CT ΔΣ ADC With a Multi-Path Multi-Frequency Chopping Scheme

Sundeep Javvaji^*, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Bert Oude Essink, Koen Beijens, Kofi A.A. Makinwa, Lucien J. Breems

^*Corresponding author for this work

Research output: Contribution to journal › Article › Scientific › peer-review

Abstract

Advances in CMOS technologies and circuit techniques have led to the development of continuous-time delta-sigma modulators (CTΔ Σ Ms) that sample at gigahertz (GHz) frequencies and achieve high linearity [-100 dBc and >120 dBFS spurious-free dynamic ranges (SFDRs)] in wide bandwidths (>100 MHz). However, at low frequencies (≤ 10 MHz), their performance is limited by the 1/f noise generated by the near-minimum size devices used in their wide-bandwidth input stages. This, in turn, limits their use in radio receivers intended to cover both the AM and FM bands. In this work, a multi-path multi-frequency chopping scheme is proposed to suppress 1/f noise, while preserving interferer robustness, thermal noise levels, and linearity. Implemented in a CTΔ Σ analog-to-digital converter (ADC) sampling at 6 GHz, it achieves a 22× reduction in 1/f noise, as well as 122-dBFS SFDR and -98.3-dBc THD in a 120-MHz BW.

Original language	English
Pages (from-to)	1184-1193
Number of pages	10
Journal	IEEE Journal of Solid-State Circuits
Volume	59
Issue number	4
DOIs	https://doi.org/10.1109/JSSC.2024.3354574
Publication status	Published - 2024

Bibliographical note

Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care
Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

Keywords

Analog-to-digital converter (ADC)
continuous time (CT)
delta–sigma ( $\Delta\Sigma$ )
multi-path chopping
wideband receiver

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10.1109/JSSC.2024.3354574

Cite this

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title = "A 120-MHz BW, 122-dBFS SFDR CT ΔΣ ADC With a Multi-Path Multi-Frequency Chopping Scheme",

abstract = "Advances in CMOS technologies and circuit techniques have led to the development of continuous-time delta-sigma modulators (CTΔ Σ Ms) that sample at gigahertz (GHz) frequencies and achieve high linearity [-100 dBc and >120 dBFS spurious-free dynamic ranges (SFDRs)] in wide bandwidths (>100 MHz). However, at low frequencies (≤ 10 MHz), their performance is limited by the 1/f noise generated by the near-minimum size devices used in their wide-bandwidth input stages. This, in turn, limits their use in radio receivers intended to cover both the AM and FM bands. In this work, a multi-path multi-frequency chopping scheme is proposed to suppress 1/f noise, while preserving interferer robustness, thermal noise levels, and linearity. Implemented in a CTΔ Σ analog-to-digital converter (ADC) sampling at 6 GHz, it achieves a 22× reduction in 1/f noise, as well as 122-dBFS SFDR and -98.3-dBc THD in a 120-MHz BW.",

keywords = "Analog-to-digital converter (ADC), continuous time (CT), delta–sigma ( $\Delta\Sigma$ ), multi-path chopping, wideband receiver",

author = "Sundeep Javvaji and Muhammed Bolatkale and Shagun Bajoria and Robert Rutten and Essink, {Bert Oude} and Koen Beijens and Makinwa, {Kofi A.A.} and Breems, {Lucien J.}",

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AU - Javvaji, Sundeep

AU - Bolatkale, Muhammed

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AU - Rutten, Robert

AU - Essink, Bert Oude

AU - Beijens, Koen

AU - Makinwa, Kofi A.A.

AU - Breems, Lucien J.

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PY - 2024

Y1 - 2024

N2 - Advances in CMOS technologies and circuit techniques have led to the development of continuous-time delta-sigma modulators (CTΔ Σ Ms) that sample at gigahertz (GHz) frequencies and achieve high linearity [-100 dBc and >120 dBFS spurious-free dynamic ranges (SFDRs)] in wide bandwidths (>100 MHz). However, at low frequencies (≤ 10 MHz), their performance is limited by the 1/f noise generated by the near-minimum size devices used in their wide-bandwidth input stages. This, in turn, limits their use in radio receivers intended to cover both the AM and FM bands. In this work, a multi-path multi-frequency chopping scheme is proposed to suppress 1/f noise, while preserving interferer robustness, thermal noise levels, and linearity. Implemented in a CTΔ Σ analog-to-digital converter (ADC) sampling at 6 GHz, it achieves a 22× reduction in 1/f noise, as well as 122-dBFS SFDR and -98.3-dBc THD in a 120-MHz BW.

AB - Advances in CMOS technologies and circuit techniques have led to the development of continuous-time delta-sigma modulators (CTΔ Σ Ms) that sample at gigahertz (GHz) frequencies and achieve high linearity [-100 dBc and >120 dBFS spurious-free dynamic ranges (SFDRs)] in wide bandwidths (>100 MHz). However, at low frequencies (≤ 10 MHz), their performance is limited by the 1/f noise generated by the near-minimum size devices used in their wide-bandwidth input stages. This, in turn, limits their use in radio receivers intended to cover both the AM and FM bands. In this work, a multi-path multi-frequency chopping scheme is proposed to suppress 1/f noise, while preserving interferer robustness, thermal noise levels, and linearity. Implemented in a CTΔ Σ analog-to-digital converter (ADC) sampling at 6 GHz, it achieves a 22× reduction in 1/f noise, as well as 122-dBFS SFDR and -98.3-dBc THD in a 120-MHz BW.

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A 120-MHz BW, 122-dBFS SFDR CT ΔΣ ADC With a Multi-Path Multi-Frequency Chopping Scheme

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