A data-compressive wired-or readout for massively parallel neural recording

Dante G. Muratore; Pulkit Tandon; Mary Wootters; E. J. Chichilnisky; Subhasish Mitra; Boris Murmann

doi:10.1109/ISCAS.2019.8702387

A data-compressive wired-or readout for massively parallel neural recording

Dante G. Muratore, Pulkit Tandon, Mary Wootters, E. J. Chichilnisky, Subhasish Mitra, Boris Murmann

Bio-Electronics

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

3 Citations (Scopus)

Abstract

This paper describes an architecture for the massively parallel digitization of neural action potentials. The scheme achieves simultaneous data compression and channel multiplexing through wired-OR interactions within an array of single-slope A/D converters. The achieved compression is lossy but effective at retaining the critical samples belonging to action potential spikes. Simulation results using ex-vivo experimental data from a 512-channel array show compression rates up to ∼73x while maintaining ≥90% reconstruction coverage for parasol cells in the primate retina.

Original language	English
Title of host publication	2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
ISBN (Electronic)	9781728103976
DOIs	https://doi.org/10.1109/ISCAS.2019.8702387
Publication status	Published - 2019
Event	2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Sapporo, Japan Duration: 26 May 2019 → 29 May 2019

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2019-May
ISSN (Print)	0271-4310

Conference

Conference	2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
Country/Territory	Japan
City	Sapporo
Period	26/05/19 → 29/05/19

Keywords

A/D conversion
Brain-Machine Interfaces
Compression Algorithm
Neural Interfaces

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10.1109/ISCAS.2019.8702387

Cite this

Muratore, D. G., Tandon, P., Wootters, M., Chichilnisky, E. J., Mitra, S., & Murmann, B. (2019). A data-compressive wired-or readout for massively parallel neural recording. In 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings Article 8702387 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2019-May). Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/ISCAS.2019.8702387

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title = "A data-compressive wired-or readout for massively parallel neural recording",

abstract = "This paper describes an architecture for the massively parallel digitization of neural action potentials. The scheme achieves simultaneous data compression and channel multiplexing through wired-OR interactions within an array of single-slope A/D converters. The achieved compression is lossy but effective at retaining the critical samples belonging to action potential spikes. Simulation results using ex-vivo experimental data from a 512-channel array show compression rates up to ∼73x while maintaining ≥90% reconstruction coverage for parasol cells in the primate retina.",

keywords = "A/D conversion, Brain-Machine Interfaces, Compression Algorithm, Neural Interfaces",

author = "Muratore, {Dante G.} and Pulkit Tandon and Mary Wootters and Chichilnisky, {E. J.} and Subhasish Mitra and Boris Murmann",

year = "2019",

doi = "10.1109/ISCAS.2019.8702387",

language = "English",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

booktitle = "2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings",

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note = "2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 ; Conference date: 26-05-2019 Through 29-05-2019",

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Muratore, DG, Tandon, P, Wootters, M, Chichilnisky, EJ, Mitra, S & Murmann, B 2019, A data-compressive wired-or readout for massively parallel neural recording. in 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings., 8702387, Proceedings - IEEE International Symposium on Circuits and Systems, vol. 2019-May, Institute of Electrical and Electronics Engineers (IEEE), 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, 26/05/19. https://doi.org/10.1109/ISCAS.2019.8702387

A data-compressive wired-or readout for massively parallel neural recording. / Muratore, Dante G.; Tandon, Pulkit; Wootters, Mary et al.
2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers (IEEE), 2019. 8702387 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2019-May).

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

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AU - Mitra, Subhasish

AU - Murmann, Boris

PY - 2019

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AB - This paper describes an architecture for the massively parallel digitization of neural action potentials. The scheme achieves simultaneous data compression and channel multiplexing through wired-OR interactions within an array of single-slope A/D converters. The achieved compression is lossy but effective at retaining the critical samples belonging to action potential spikes. Simulation results using ex-vivo experimental data from a 512-channel array show compression rates up to ∼73x while maintaining ≥90% reconstruction coverage for parasol cells in the primate retina.

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M3 - Conference contribution

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T3 - Proceedings - IEEE International Symposium on Circuits and Systems

BT - 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings

PB - Institute of Electrical and Electronics Engineers (IEEE)

T2 - 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019

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ER -

Muratore DG, Tandon P, Wootters M, Chichilnisky EJ, Mitra S, Murmann B. A data-compressive wired-or readout for massively parallel neural recording. In 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers (IEEE). 2019. 8702387. (Proceedings - IEEE International Symposium on Circuits and Systems). doi: 10.1109/ISCAS.2019.8702387

A data-compressive wired-or readout for massively parallel neural recording

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