A Microcontroller with 96% Power-Conversion Efficiency using Stacked Voltage Domains

Kristof Blutman; A. Kapoor; Arjun Majumdar; J.G. Martinez; J. Echeverri; L. Sevat; A.  van der Wel; H. Fatemi; J.P. de Gyvez; K.A.A. Makinwa

doi:10.1109/vlsic.2016.7573478

A Microcontroller with 96% Power-Conversion Efficiency using Stacked Voltage Domains

Kristof Blutman, A. Kapoor, Arjun Majumdar, J.G. Martinez, J. Echeverri, L. Sevat, A. van der Wel, H. Fatemi, J.P. de Gyvez, K.A.A. Makinwa

Microelectronics

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

Abstract

This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).

Original language	English
Title of host publication	2016 IEEE Symposium on VLSI Circuits, VLSI-Circuits 2016
Subtitle of host publication	Digest of Technical Papers
Place of Publication	Piscataway, NJ
Publisher	IEEE
Pages	1-2
Number of pages	2
ISBN (Electronic)	978-1-5090-0635-9
DOIs	https://doi.org/10.1109/vlsic.2016.7573478
Publication status	Published - 22 Sept 2016
Event	30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016 - Honolulu, United States Duration: 14 Jun 2016 → 17 Jun 2016

Conference

Conference	30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016
Country/Territory	United States
City	Honolulu
Period	14/06/16 → 17/06/16

Keywords

Power capacitors
Stacking
Read only memory
Random access memory
Voltage control
Clocks
Current measurement

Access to Document

10.1109/vlsic.2016.7573478

Cite this

Blutman, K., Kapoor, A., Majumdar, A., Martinez, J. G., Echeverri, J., Sevat, L., van der Wel, A., Fatemi, H., Gyvez, J. P. D., & Makinwa, K. A. A. (2016). A Microcontroller with 96% Power-Conversion Efficiency using Stacked Voltage Domains. In 2016 IEEE Symposium on VLSI Circuits, VLSI-Circuits 2016: Digest of Technical Papers (pp. 1-2). IEEE. https://doi.org/10.1109/vlsic.2016.7573478

@inproceedings{57096b1c4a5049e3a8be97d23ecbd0c0,

title = "A Microcontroller with 96% Power-Conversion Efficiency using Stacked Voltage Domains",

abstract = "This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).",

keywords = "Power capacitors, Stacking, Read only memory, Random access memory, Voltage control, Clocks, Current measurement",

author = "Kristof Blutman and A. Kapoor and Arjun Majumdar and J.G. Martinez and J. Echeverri and L. Sevat and {van der Wel}, A. and H. Fatemi and Gyvez, {J.P. de} and K.A.A. Makinwa",

year = "2016",

month = sep,

day = "22",

doi = "10.1109/vlsic.2016.7573478",

language = "English",

pages = "1--2",

booktitle = "2016 IEEE Symposium on VLSI Circuits, VLSI-Circuits 2016",

publisher = "IEEE",

address = "United States",

note = "30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016 ; Conference date: 14-06-2016 Through 17-06-2016",

}

Blutman, K, Kapoor, A, Majumdar, A, Martinez, JG, Echeverri, J, Sevat, L, van der Wel, A, Fatemi, H, Gyvez, JPD & Makinwa, KAA 2016, A Microcontroller with 96% Power-Conversion Efficiency using Stacked Voltage Domains. in 2016 IEEE Symposium on VLSI Circuits, VLSI-Circuits 2016: Digest of Technical Papers. IEEE, Piscataway, NJ, pp. 1-2, 30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016, Honolulu, United States, 14/06/16. https://doi.org/10.1109/vlsic.2016.7573478

A Microcontroller with 96% Power-Conversion Efficiency using Stacked Voltage Domains. / Blutman, Kristof; Kapoor, A.; Majumdar, Arjun et al.
2016 IEEE Symposium on VLSI Circuits, VLSI-Circuits 2016: Digest of Technical Papers. Piscataway, NJ: IEEE, 2016. p. 1-2.

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

T1 - A Microcontroller with 96% Power-Conversion Efficiency using Stacked Voltage Domains

AU - Blutman, Kristof

AU - Kapoor, A.

AU - Majumdar, Arjun

AU - Martinez, J.G.

AU - Echeverri, J.

AU - Sevat, L.

AU - van der Wel, A.

AU - Fatemi, H.

AU - Gyvez, J.P. de

AU - Makinwa, K.A.A.

PY - 2016/9/22

Y1 - 2016/9/22

N2 - This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).

AB - This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).

KW - Power capacitors

KW - Stacking

KW - Read only memory

KW - Random access memory

KW - Voltage control

KW - Clocks

KW - Current measurement

U2 - 10.1109/vlsic.2016.7573478

DO - 10.1109/vlsic.2016.7573478

M3 - Conference contribution

SP - 1

EP - 2

BT - 2016 IEEE Symposium on VLSI Circuits, VLSI-Circuits 2016

PB - IEEE

CY - Piscataway, NJ

T2 - 30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016

Y2 - 14 June 2016 through 17 June 2016

ER -

A Microcontroller with 96% Power-Conversion Efficiency using Stacked Voltage Domains

Abstract

Conference

Keywords

Access to Document

Fingerprint

Cite this