A Microcontroller with 96% Power-Conversion Efficiency using Stacked Voltage Domains

Kristof Blutman, A. Kapoor, Arjun Majumdar, J.G. Martinez, J. Echeverri, L. Sevat, A. van der Wel, H. Fatemi, J.P. de Gyvez, K.A.A. Makinwa

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

Abstract

This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).
Original languageEnglish
Title of host publication2016 IEEE Symposium on VLSI Circuits, VLSI-Circuits 2016
Subtitle of host publicationDigest of Technical Papers
Place of PublicationPiscataway, NJ
PublisherIEEE
Pages1-2
Number of pages2
ISBN (Electronic)978-1-5090-0635-9
DOIs
Publication statusPublished - 22 Sep 2016
Event30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016 - Honolulu, United States
Duration: 14 Jun 201617 Jun 2016

Conference

Conference30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016
CountryUnited States
CityHonolulu
Period14/06/1617/06/16

Keywords

  • Power capacitors
  • Stacking
  • Read only memory
  • Random access memory
  • Voltage control
  • Clocks
  • Current measurement

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