Abstract
Software-based methods for the detection of control-flow errors caused by transient fault usually consist in the introduction of protecting instructions both at the beginning and at the end of basic blocks. These methods are conservative in nature, in the sense that they assume that all blocks have the same probability of being the target of control flow errors. Because of that assumption they can lead to a considerable increase both in memory and performance overhead during execution time. In this paper, we propose a static analysis that provide a more refined information about which basic blocks can be the target of control-flow-errors caused by single-bit flips. This information can then be used to guide a program transformation in which only susceptible blocks have to be protected. We implemented the static analysis and program transformation in the context of the LLVM framework and performed an extensive fault injection campaign. Our experiments show that this less conservative approach can potentially lead to gains both in memory usage and in execution time while keeping high fault coverage.
Original language | English |
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Title of host publication | Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015 |
Publisher | IEEE |
Pages | 221-226 |
Number of pages | 6 |
ISBN (Electronic) | 9781509003129 |
DOIs | |
Publication status | Published - 2 Nov 2015 |
Event | 28th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015 - Amherst, United States Duration: 12 Oct 2015 → 14 Oct 2015 |
Conference
Conference | 28th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015 |
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Country/Territory | United States |
City | Amherst |
Period | 12/10/15 → 14/10/15 |
Keywords
- and service-ability
- availability
- Fault tolerance
- Reliability