This paper presents a wideband linear direct-digital RF modulator (DDRM) in 40-nm CMOS technology. An innovative I/ Q-interleaving RF digital-to-analog converter (DAC) is proposed to enable the combination of in-phase (I) and quadrature (Q) signals in a more digital fashion, thereby improving the linearity performance at large bandwidths. The DDRM also features an advanced second-order hold digital interpolation filter to suppress the sampling spectral replicas in the presence of large bandwidth signals. Moreover, the harmonic rejection technique in the context of RF DAC operation is adopted and implemented. The 2 × 9-bit DDRM core occupies 0.21 mm 2 and consumes 110 and 146 mW at 1 and 3 GHz, respectively, with the peak power of +9.2 dBm. The error vector magnitude (EVM) and adjacent channel power ratio (ACPR) at 3 GHz for a 57-MHz 64-QAM signal are better than -30 and -45 dB, respectively, and ACPR remains as low as -44 dBc up to a wide bandwidth of 113 MHz.