Cryo-CMOS Voltage References for the Ultrawide Temperature Range From 300 K Down to 4.2 K

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This article presents a family of sub-1-V, fully-CMOS voltage references adopting MOS devices in weak inversion to achieve continuous operation from room temperature (RT) down to cryogenic temperatures. Their accuracy limitations due to curvature, body effect, and mismatch are investigated and experimentally validated. Implemented in 40-nm CMOS, the references show a line regulation better than 2.7%/V from a supply as low as 0.99 V. By applying dynamic element matching (DEM) techniques, a spread of 1.2% (3<inline-formula> <tex-math notation="LaTeX">$\sigma$</tex-math> </inline-formula>) from 4.2 to 300 K can be achieved, resulting in a temperature coefficient (TC) of 111 ppm/K. As the first significant statistical characterization extending down to cryogenic temperatures, the results demonstrate the ability of the proposed architectures to work under cryogenic harsh environments, such as space-and quantum-computing applications.

Original languageEnglish
Number of pages11
JournalIEEE Journal of Solid-State Circuits
Publication statusAccepted/In press - 2024


  • Body effect
  • cryogenic CMOS (cryo-CMOS)
  • Cryogenics
  • extreme environment
  • Logic gates
  • MOS-based
  • quantum computing
  • Quantum computing
  • Resistors
  • Temperature distribution
  • Threshold voltage
  • voltage references


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