Enhanced Bipolar Transistor Design for the Linearization of the Base-Collector Capacitance

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Abstract

A frequency, bias and output power independent linearization technique for reducing the non-linear base-collector capacitance related distortion is proposed. Based on Volterra series analysis, the optimum base-collector capacitance for linear device operation is determined while respecting physical constrains. It is shown that by modifying the extrinsic base-collector region for an otherwise uncompromised device, the Cbc linearity compensation can be included within the transistor design itself. The practicality of this implementation is demonstrated by considering the doping profile accuracy requirements for achieving a significant OIP3 improvement of at least 5dB.
Original languageEnglish
Title of host publicationProceedings - 2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2017
Place of PublicationPiscataway, NJ
PublisherIEEE
Pages126-129
Number of pages4
ISBN (Electronic) 978-1-5090-6383-3
ISBN (Print)978-1-5090-6382-6
DOIs
Publication statusPublished - 2017
Event2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2017 - Miami, FL, United States
Duration: 19 Oct 201721 Oct 2017

Conference

Conference2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2017
CountryUnited States
CityMiami, FL
Period19/10/1721/10/17

Keywords

  • linearity
  • Intermodulation distortion
  • bipolar transistor
  • semiconductor device
  • doping profile
  • amplifiers
  • base-collector capacitance

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