Low-Offset Band-Pass Signal Shaper with High Time Resolution in 40 nm CMOS Technology

A.R. Mohammad Zaki; Stoyan Nihtianova

doi:10.1109/IECON51785.2023.10312049

Low-Offset Band-Pass Signal Shaper with High Time Resolution in 40 nm CMOS Technology

Electronic Instrumentation

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

Abstract

State-of-the-art readout integrated circuits (ROICs) operating in particle-counting mode are gravitating toward high time resolution, low-noise, and low-power analog readout frontends to detect and register the arrival time of charge signals with a high accuracy. To achieve a time resolution of a few nanoseconds, an intermediate stage, known as a signal shaper block, is the preferred solution in the readout frontend, as it compensates for the inter-symbol interference-induced errors by realizing a band-pass transfer function. This paper presents the design methodology and experimental characterization of a state-of-the-art, high time resolution, low-offset, and power-efficient band-pass signal shaper block intended for fitting the voltage signals generated by a charge-sensitive amplifier (CSA) as a function of charge signals as small as 160 aC, into timeframes of 2.5 ns with 17 times offset attenuation while consuming 0.17 mW of power. Detailed information about the operation principle of this CSA, designed in TSMC 40 nm MS/RF CMOS technology, is reported in a previous publication.

Original language	English
Title of host publication	Proceedings of the IECON 2023- 49th Annual Conference of the IEEE Industrial Electronics Society
Publisher	IEEE
Number of pages	5
ISBN (Electronic)	979-8-3503-3182-0
ISBN (Print)	979-8-3503-3183-7
DOIs	https://doi.org/10.1109/IECON51785.2023.10312049
Publication status	Published - 2023
Event	IECON 2023- 49th Annual Conference of the IEEE Industrial Electronics Society - Singapore, Singapore Duration: 16 Oct 2023 → 19 Oct 2023

Publication series

Name	Proceedings of the Annual Conference of the IEEE Industrial Electronics Society
Publisher	IEEE
ISSN (Print)	1553-572X
ISSN (Electronic)	2577-1647

Conference

Conference	IECON 2023- 49th Annual Conference of the IEEE Industrial Electronics Society
Country/Territory	Singapore
City	Singapore
Period	16/10/23 → 19/10/23

Bibliographical note

Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care
Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

Keywords

readout integrated circuit ROIC
analog frontend
charge-sensitive amplifier
signal shaper block
low-offset
lownoise
power-efficient
high time resolution

Access to Document

10.1109/IECON51785.2023.10312049

Cite this

Mohammad Zaki, A. R., & Nihtianova, S. (2023). Low-Offset Band-Pass Signal Shaper with High Time Resolution in 40 nm CMOS Technology. In Proceedings of the IECON 2023- 49th Annual Conference of the IEEE Industrial Electronics Society (Proceedings of the Annual Conference of the IEEE Industrial Electronics Society). IEEE. https://doi.org/10.1109/IECON51785.2023.10312049

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title = "Low-Offset Band-Pass Signal Shaper with High Time Resolution in 40 nm CMOS Technology",

abstract = "State-of-the-art readout integrated circuits (ROICs) operating in particle-counting mode are gravitating toward high time resolution, low-noise, and low-power analog readout frontends to detect and register the arrival time of charge signals with a high accuracy. To achieve a time resolution of a few nanoseconds, an intermediate stage, known as a signal shaper block, is the preferred solution in the readout frontend, as it compensates for the inter-symbol interference-induced errors by realizing a band-pass transfer function. This paper presents the design methodology and experimental characterization of a state-of-the-art, high time resolution, low-offset, and power-efficient band-pass signal shaper block intended for fitting the voltage signals generated by a charge-sensitive amplifier (CSA) as a function of charge signals as small as 160 aC, into timeframes of 2.5 ns with 17 times offset attenuation while consuming 0.17 mW of power. Detailed information about the operation principle of this CSA, designed in TSMC 40 nm MS/RF CMOS technology, is reported in a previous publication.",

keywords = "readout integrated circuit ROIC, analog frontend, charge-sensitive amplifier, signal shaper block, low-offset, lownoise, power-efficient, high time resolution",

author = "{Mohammad Zaki}, A.R. and Stoyan Nihtianova",

note = "Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.; IECON 2023- 49th Annual Conference of the IEEE Industrial Electronics Society ; Conference date: 16-10-2023 Through 19-10-2023",

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Mohammad Zaki, AR & Nihtianova, S 2023, Low-Offset Band-Pass Signal Shaper with High Time Resolution in 40 nm CMOS Technology. in Proceedings of the IECON 2023- 49th Annual Conference of the IEEE Industrial Electronics Society. Proceedings of the Annual Conference of the IEEE Industrial Electronics Society, IEEE, IECON 2023- 49th Annual Conference of the IEEE Industrial Electronics Society, Singapore, Singapore, 16/10/23. https://doi.org/10.1109/IECON51785.2023.10312049

Low-Offset Band-Pass Signal Shaper with High Time Resolution in 40 nm CMOS Technology. / Mohammad Zaki, A.R.; Nihtianova, Stoyan.
Proceedings of the IECON 2023- 49th Annual Conference of the IEEE Industrial Electronics Society. IEEE, 2023. (Proceedings of the Annual Conference of the IEEE Industrial Electronics Society).

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

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N1 - Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

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N2 - State-of-the-art readout integrated circuits (ROICs) operating in particle-counting mode are gravitating toward high time resolution, low-noise, and low-power analog readout frontends to detect and register the arrival time of charge signals with a high accuracy. To achieve a time resolution of a few nanoseconds, an intermediate stage, known as a signal shaper block, is the preferred solution in the readout frontend, as it compensates for the inter-symbol interference-induced errors by realizing a band-pass transfer function. This paper presents the design methodology and experimental characterization of a state-of-the-art, high time resolution, low-offset, and power-efficient band-pass signal shaper block intended for fitting the voltage signals generated by a charge-sensitive amplifier (CSA) as a function of charge signals as small as 160 aC, into timeframes of 2.5 ns with 17 times offset attenuation while consuming 0.17 mW of power. Detailed information about the operation principle of this CSA, designed in TSMC 40 nm MS/RF CMOS technology, is reported in a previous publication.

AB - State-of-the-art readout integrated circuits (ROICs) operating in particle-counting mode are gravitating toward high time resolution, low-noise, and low-power analog readout frontends to detect and register the arrival time of charge signals with a high accuracy. To achieve a time resolution of a few nanoseconds, an intermediate stage, known as a signal shaper block, is the preferred solution in the readout frontend, as it compensates for the inter-symbol interference-induced errors by realizing a band-pass transfer function. This paper presents the design methodology and experimental characterization of a state-of-the-art, high time resolution, low-offset, and power-efficient band-pass signal shaper block intended for fitting the voltage signals generated by a charge-sensitive amplifier (CSA) as a function of charge signals as small as 160 aC, into timeframes of 2.5 ns with 17 times offset attenuation while consuming 0.17 mW of power. Detailed information about the operation principle of this CSA, designed in TSMC 40 nm MS/RF CMOS technology, is reported in a previous publication.

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ER -

Low-Offset Band-Pass Signal Shaper with High Time Resolution in 40 nm CMOS Technology

Abstract

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Keywords

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