Power gating of VLSI circuits using MEMS switches in low power applications

Hosam Shobak*, Mohamed Ghoneim, Nawal El Boghdady, Sarah Halawa, Sophinese Iskander, Mohab Anis

*Corresponding author for this work

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

5 Citations (Scopus)

Abstract

Power dissipation poses a great challenge for VLSI designers. With the intense down-scaling of technology, the total power consumption of the chip is made up primarily of leakage power dissipation. This paper proposes combining a custom-designed MEMS switch to power gate VLSI circuits, such that leakage power is efficiently reduced while accounting for performance and reliability. The designed MEMS switch is characterized by an 0.1876 ? ON resistance and requires 4.5 V to switch. As a result of implementing this novel power gating technique, a standby leakage power reduction of 99% and energy savings of 33.3% are achieved. Finally the possible effects of surge currents and ground bounce noise are studied. These findings allow longer operation times for battery-operated systems characterized by long standby periods.

Original languageEnglish
Title of host publication2011 International Conference on Microelectronics, ICM 2011
DOIs
Publication statusPublished - 2011
Externally publishedYes
Event2011 23rd International Conference on Microelectronics, ICM 2011 - Hammamet, Tunisia
Duration: 19 Dec 201122 Dec 2011

Publication series

NameProceedings of the International Conference on Microelectronics, ICM

Conference

Conference2011 23rd International Conference on Microelectronics, ICM 2011
Country/TerritoryTunisia
CityHammamet
Period19/12/1122/12/11

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