Research output per year
Research output per year
Ajay Shetgaonkar (Graduate Student Member, IEEE) was born on September 17th, 1993 in Goa, India. He received a B.E. degree in electrical and electronic engineering from Goa College of Engineering, Goa, India, in 2016. In 2020, he received an M.Sc. degree in electrical power engineering from the Delft University of Technology, the Netherlands (graduated “cum laude”, equivalent to maximum honors). He is currently working toward a Ph.D. degree at the Delft University of Technology, the Netherlands. His research interests include future power system dynamics and stability, integration of renewable energy resources, modeling of HVDC breakers, and design of advanced protection and control systems for modular multilevel converter-based HVDC systems in the HVDC electrical grid. He is also a student member of CIGRE.
Research output: Contribution to journal › Article › Scientific › peer-review
Research output: Thesis › Dissertation (TU Delft)
Research output: Contribution to journal › Article › Scientific › peer-review
Research output: Contribution to journal › Article › Scientific › peer-review
Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review