TY - GEN
T1 - A 6GHz Multi-Path Multi-Frequency Chopping CTΔΣ Modulator achieving 122dBFS SFDR from 150kHz to 120MHz BW
AU - Javvaji, Sundeep
AU - Bolatkale, Muhammed
AU - Bajoria, Shagun
AU - Rutten, Robert
AU - Essink, Bert Oude
AU - Beijens, Koen
AU - Makinwa, Kofi
AU - Breems, Lucien
N1 - Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.
PY - 2023
Y1 - 2023
N2 - Advances in CMOS technologies have led to the development of continuous-time ΔΣ modulators (CTDSMs) with GHz sampling rates that achieve better than-100dBc linearity and bandwidths above 100MHz. However, at low frequencies (below 10MHz), their SNDR is limited by 1/f noise, which limits their use in radio receivers intended to cover both the AM and the FM bands. In this work, a multi-path multi-frequency chopping scheme is proposed to suppress 1/f noise, while maintaining interferer robustness, noise, spurious, and linearity performance. Implemented in a CTDSM sampling at 6GHz, it reduces its 1/f noise corner frequency by 22x and achieves -98.3dBc THD, 122dBFS SFDR in 120MHzBW.
AB - Advances in CMOS technologies have led to the development of continuous-time ΔΣ modulators (CTDSMs) with GHz sampling rates that achieve better than-100dBc linearity and bandwidths above 100MHz. However, at low frequencies (below 10MHz), their SNDR is limited by 1/f noise, which limits their use in radio receivers intended to cover both the AM and the FM bands. In this work, a multi-path multi-frequency chopping scheme is proposed to suppress 1/f noise, while maintaining interferer robustness, noise, spurious, and linearity performance. Implemented in a CTDSM sampling at 6GHz, it reduces its 1/f noise corner frequency by 22x and achieves -98.3dBc THD, 122dBFS SFDR in 120MHzBW.
UR - http://www.scopus.com/inward/record.url?scp=85167589315&partnerID=8YFLogxK
U2 - 10.23919/VLSITechnologyandCir57934.2023.10185356
DO - 10.23919/VLSITechnologyandCir57934.2023.10185356
M3 - Conference contribution
AN - SCOPUS:85167589315
SN - 979-8-3503-4669-5
T3 - Digest of Technical Papers - Symposium on VLSI Technology
BT - Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023
PB - IEEE
T2 - 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023
Y2 - 11 June 2023 through 16 June 2023
ER -