A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow

Zhongkai Wang; Minsoo  Choi; John Wright; Kyoungtae  Lee; Zhaokai  Liu; Bozhi Yin; Jaeduk  Han; Sijun Du; Elad  Alon

doi:10.1109/ISCAS48785.2022.9937615

A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow

Zhongkai Wang^*, Minsoo Choi, John Wright, Kyoungtae Lee, Zhaokai Liu, Bozhi Yin, Jaeduk Han, Sijun Du, Elad Alon

^*Corresponding author for this work

Electronic Instrumentation

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

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Abstract

We present a ring-oscillator-based sub-sampling phase-locked loop (PLL) using a generator-based design flow. A hybrid loop with a delta-sigma ($\Delta \Sigma$) modulator is applied to reduce the loop filter (LF) area and the control ripple. The generator automatically produces the ring oscillator and PLL to meet the provided specifications. The 10-GHz PLL instance implemented in 28-nm planar process achieves RMS jitter of}299.5 fs and power of 9.9 mW from a 1-V supply.

Original language	English
Title of host publication	Proceedings of the 2022 IEEE International Symposium on Circuits and Systems (ISCAS)
Place of Publication	Danvers
Publisher	IEEE
Pages	2881-2885
Number of pages	5
ISBN (Electronic)	978-1-6654-8485-5
ISBN (Print)	978-1-6654-8486-2
DOIs	https://doi.org/10.1109/ISCAS48785.2022.9937615
Publication status	Published - 2022
Event	2022 IEEE International Symposium on Circuits and Systems (ISCAS) - Austin, United States Duration: 27 May 2022 → 1 Jun 2022

Conference

Conference	2022 IEEE International Symposium on Circuits and Systems (ISCAS)
Country/Territory	United States
City	Austin
Period	27/05/22 → 1/06/22

Bibliographical note

Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care

Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

Keywords

PLL
sub-sampling
ring oscillator
hybrid
PLL generator

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10.1109/ISCAS48785.2022.9937615

A_Ring-Oscillator_Sub-Sampling_PLL_With_Hybrid_Loop_Using_Generator-Based_Design_FlowFinal published version, 2.18 MB

Cite this

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title = "A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow",

abstract = "We present a ring-oscillator-based sub-sampling phase-locked loop (PLL) using a generator-based design flow. A hybrid loop with a delta-sigma ($\Delta \Sigma$) modulator is applied to reduce the loop filter (LF) area and the control ripple. The generator automatically produces the ring oscillator and PLL to meet the provided specifications. The 10-GHz PLL instance implemented in 28-nm planar process achieves RMS jitter of}299.5 fs and power of 9.9 mW from a 1-V supply.",

keywords = "PLL, sub-sampling, ring oscillator, hybrid, PLL generator",

author = "Zhongkai Wang and Minsoo Choi and John Wright and Kyoungtae Lee and Zhaokai Liu and Bozhi Yin and Jaeduk Han and Sijun Du and Elad Alon",

note = "Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public. ; 2022 IEEE International Symposium on Circuits and Systems (ISCAS) ; Conference date: 27-05-2022 Through 01-06-2022",

year = "2022",

doi = "10.1109/ISCAS48785.2022.9937615",

language = "English",

isbn = "978-1-6654-8486-2",

pages = "2881--2885",

booktitle = "Proceedings of the 2022 IEEE International Symposium on Circuits and Systems (ISCAS)",

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address = "United States",

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Wang, Z, Choi, M, Wright, J, Lee, K, Liu, Z, Yin, B, Han, J, Du, S & Alon, E 2022, A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow. in Proceedings of the 2022 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, Danvers, pp. 2881-2885, 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Austin, United States, 27/05/22. https://doi.org/10.1109/ISCAS48785.2022.9937615

A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow. / Wang, Zhongkai; Choi, Minsoo ; Wright, John et al.
Proceedings of the 2022 IEEE International Symposium on Circuits and Systems (ISCAS). Danvers: IEEE, 2022. p. 2881-2885.

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

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AU - Wang, Zhongkai

AU - Choi, Minsoo

AU - Wright, John

AU - Lee, Kyoungtae

AU - Liu, Zhaokai

AU - Yin, Bozhi

AU - Han, Jaeduk

AU - Du, Sijun

AU - Alon, Elad

N1 - Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

PY - 2022

Y1 - 2022

N2 - We present a ring-oscillator-based sub-sampling phase-locked loop (PLL) using a generator-based design flow. A hybrid loop with a delta-sigma ($\Delta \Sigma$) modulator is applied to reduce the loop filter (LF) area and the control ripple. The generator automatically produces the ring oscillator and PLL to meet the provided specifications. The 10-GHz PLL instance implemented in 28-nm planar process achieves RMS jitter of}299.5 fs and power of 9.9 mW from a 1-V supply.

AB - We present a ring-oscillator-based sub-sampling phase-locked loop (PLL) using a generator-based design flow. A hybrid loop with a delta-sigma ($\Delta \Sigma$) modulator is applied to reduce the loop filter (LF) area and the control ripple. The generator automatically produces the ring oscillator and PLL to meet the provided specifications. The 10-GHz PLL instance implemented in 28-nm planar process achieves RMS jitter of}299.5 fs and power of 9.9 mW from a 1-V supply.

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KW - sub-sampling

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KW - hybrid

KW - PLL generator

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BT - Proceedings of the 2022 IEEE International Symposium on Circuits and Systems (ISCAS)

PB - IEEE

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T2 - 2022 IEEE International Symposium on Circuits and Systems (ISCAS)

Y2 - 27 May 2022 through 1 June 2022

ER -

A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow

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Keywords

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