Abstract
This article presents a wideband 2× 12 -bit direct-digital RF modulator (DDRM) operating in a 0.5-to-3-GHz band for 5G transmitters. The proposed digital Cartesian modulator features an advanced IQ-mapping technique to boost RF power by 3 dB and suppress the I/Q image. To verify the proposed concept, a 40-nm CMOS prototype is implemented whose RF peak output power at 2 GHz is more than 14 dBm. It achieves an adjacent-channel leakage ratio (ACLR) of -52 dBc and an error vector magnitude (EVM) of -40 dB for a 20-MHz 256-QAM signal at 2.4 GHz. With a 320-MHz 256-QAM signal, the measured ACLR and EVM performances are better than -43 dBc and -32 dB at 2.4 GHz, respectively, without using any digital pre-distortion.
Original language | English |
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Pages (from-to) | 1446-1456 |
Number of pages | 11 |
Journal | IEEE Journal of Solid-State Circuits |
Volume | 57 |
Issue number | 5 |
DOIs | |
Publication status | Published - 2022 |
Keywords
- Clocks
- Computer architecture
- Current-steering digital-to-analog converter (DAC)
- Delays
- digital pre-distortion (DPD)-free
- digital-intensive transmitter (DTX)
- direct-digital RF modulator (DDRM)
- I/Q image
- IQ-mapping
- Microprocessors
- mixing DAC
- Modulation
- PA pre-driver
- Power generation
- quadrature up-converter
- Radio frequency
- radio-frequency digital-analog converter (RFDAC).