Abstract
This thesis describes the development of low-noise power-efficient analog interface circuitry for CMOS image sensors. It focuses on improving two aspects of the interface circuitry: firstly, lowering the noise in the front-end readout circuit, and secondly the realization of more power-efficient analog-to-digital converters (ADCs) that are capable of reading out high-resolution imaging arrays...
Original language | English |
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Qualification | Doctor of Philosophy |
Awarding Institution |
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Supervisors/Advisors |
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Award date | 4 Sept 2007 |
Print ISBNs | 978-90-9022129-8 |
Publication status | Published - 2007 |