Testing address decoder faults in two-port memories: fault models, test, consequences of port restrictions, and test strategy

S Hamdioui, AJ van de Goor Ph D

Research output: Contribution to journalArticleScientificpeer-review

1 Citation (Scopus)
Original languageUndefined/Unknown
Pages (from-to)487-498
Number of pages12
JournalJournal of Electronic Testing: theory and applications
Issue number5
Publication statusPublished - 2000


  • ZX Int.klas.verslagjaar < 2002

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