Guard-NoC: A protection against side-channel attacks for MPSoCs

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Abstract

Multi-Processor System-on-Chips (MPSoCs) are popular computational platforms for a wide variety of applications due to their energy efficiency and flexibility. Like many other platforms they are vulnerable to Side Channel Attacks (SCAs). In particular, Logical SCAs (LSCAs) are very powerful as sensitive information can be retrieved by simply observing system properties that depend on the victim's software execution on the MPSoC. Unfortunately, many of the current protection mechanisms are either platform dependent or are effective only against a reduced set of attacks. In this work, we present Guard-NoC, a secure Network-on-Chip (NoC) architecture able to protect MPSoCs against a wide variety of LSCAs. The secure NoC employs three application-independent strategies to hide and isolate sensitive information: i) blinding the execution time of operations; ii) masking the execution time of operations; and iii) dual communication strategy (i.e., use packet and circuit switching simultaneously). Our results show that our secure NoC is resilient against practical LSCAs and leaks almost no information while having a minimal area and power overhead.

Original languageEnglish
Title of host publication2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Subtitle of host publicationProceedings
EditorsL. O'Conner
Place of PublicationPisacataway
PublisherIEEE
Pages536-541
Number of pages6
ISBN (Electronic)978-1-7281-5775-7
ISBN (Print)978-1-7281-5776-4
DOIs
Publication statusPublished - 2020
Event19th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020 - Limassol, Cyprus
Duration: 6 Jul 20208 Jul 2020

Conference

Conference19th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020
CountryCyprus
CityLimassol
Period6/07/208/07/20

Keywords

  • Countermeasure
  • Hardware Security
  • Network-on-Chip
  • Side Channel Attack

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