On Optimizing Test Cost for Wafer-to-Wafer 3D Stacked ICs

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

1 Citation (Scopus)
Original languageEnglish
Title of host publication7th International conference on design & technology of integrated systems in nanoscale era
Editors s.n.
Place of Publications.l.
Publishers.n.
Pages1-6
Number of pages6
Publication statusPublished - 2012
EventDTIS 2012 - s.l.
Duration: 16 May 201218 Jun 2012

Publication series

Name
Publishers.n.

Conference

ConferenceDTIS 2012
Period16/05/1218/06/12

Cite this

Taouil, M., & Hamdioui, S. (2012). On Optimizing Test Cost for Wafer-to-Wafer 3D Stacked ICs. In s.n. (Ed.), 7th International conference on design & technology of integrated systems in nanoscale era (pp. 1-6). s.n..